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Re: [koruza] Nice project!

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  • From: Caleb James DeLisle < >
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  • Subject: Re: [koruza] Nice project!
  • Date: Fri, 15 Aug 2014 11:48:25 +0200

I looked for ability to turn off CRC and I found:

I'm not sure how many eth cards support it.
My ideal would be total control over the actual bits which are written
to the wire because my protocol does not need ethernet to run under it...

And of course I'm interested in ADSL style FEC, ideally adaptive to the
quality of the link...


PS: Musti, can I have a copy of the paper you wrote on SFP based FSO links?

On 08/14/2014 09:04 AM, Paul Gardner-Stephen wrote:
> Hello Caleb,
> The idea of disabling the ethernet FCS to use FEC to increase throughput is
> an interesting one.
> I recently did some work on ethernet implementing ethernet TX and RX on an
> FPGA where I was looking for an ethernet card where I could turn off all
> hardware FCS and CRC checks to help debug the development. I didn't find
> any. I didn't think to check openwrt/atheros if it was possible.
> Even if it proves to not be possible to disable this in the atheros
> ethernet driver, it would be feasible to make an ethernet stack on an FPGA
> board that completely ignored the FCS, and even implement some sort of
> network coding at the hardware level. With my existing work on making a
> working ethernet tranceiver, this wouldn't be too hard to do.
> Paul.
> On Thu, Aug 14, 2014 at 1:04 PM, Caleb James DeLisle
> < >
> wrote:
>> Hello Musti and others,
>> This is a very interesting project, thanks for taking it on.
>> I'm curious about a few things (other than when will you ship a prototype
>> :) )
>> I was originally a bit wary of the idea of using an SFP module
>> as a light source but you seem to have written a paper studying
>> it. I'm not qualified to judge it as an EE but I am still curious
>> about how you came to the feasibility conclusion and how much power
>> those little guys have.
>> I can't seem to find the paper so if you can point me in the right
>> direction I'd be most grateful.
>> Also I'm curious whether the TPLink device you selected does any
>> processing of the ethernet packets. Most interestingly does it
>> validate checksums and discard packets with bit errors or is it
>> possible to use forward error correction higher up the stack.
>> As always, I'm curious about the failure modes you're seeing in your
>> tests, what's going wrong? Are they mostly getting knocked out of
>> alignment by wind/micro-earthquakes/magic? Deposits on the lenses?
>> Temporary fog/smog?
>> Thanks for making such an interesting project.
>> Caleb
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