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Re: [koruza] Nice project!

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  • From: Paul Gardner-Stephen < >
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  • Subject: Re: [koruza] Nice project!
  • Date: Thu, 14 Aug 2014 16:34:53 +0930

Hello Caleb,

The idea of disabling the ethernet FCS to use FEC to increase throughput is an interesting one.  

I recently did some work on ethernet implementing ethernet TX and RX on an FPGA where I was looking for an ethernet card where I could turn off all hardware FCS and CRC checks to help debug the development. I didn't find any.  I didn't think to check openwrt/atheros if it was possible. 

Even if it proves to not be possible to disable this in the atheros ethernet driver, it would be feasible to make an ethernet stack on an FPGA board that completely ignored the FCS, and even implement some sort of network coding at the hardware level.  With my existing work on making a working ethernet tranceiver, this wouldn't be too hard to do.


On Thu, Aug 14, 2014 at 1:04 PM, Caleb James DeLisle < > wrote:
Hello Musti and others,

This is a very interesting project, thanks for taking it on.
I'm curious about a few things (other than when will you ship a prototype :) )

I was originally a bit wary of the idea of using an SFP module
as a light source but you seem to have written a paper studying
it. I'm not qualified to judge it as an EE but I am still curious
about how you came to the feasibility conclusion and how much power
those little guys have.
I can't seem to find the paper so if you can point me in the right
direction I'd be most grateful.

Also I'm curious whether the TPLink device you selected does any
processing of the ethernet packets. Most interestingly does it
validate checksums and discard packets with bit errors or is it
possible to use forward error correction higher up the stack.

As always, I'm curious about the failure modes you're seeing in your
tests, what's going wrong? Are they mostly getting knocked out of
alignment by wind/micro-earthquakes/magic? Deposits on the lenses?
Temporary fog/smog?

Thanks for making such an interesting project.


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